Role Description

This is a full-time on-site role for a Digital Design Engineer at Mosaic SoC in Zurich. The Digital Design Engineer will be responsible for tasks related to digital circuit design, RTL coding, simulation and verification.

Key Responsibilities

  • Design and implement digital hardware using Verilog/SystemVerilog, with a focus on RISC-V-based architectures.

  • Develop and optimize RTL code for energy-efficient, low-power designs.

  • Collaborate with the architecture team to define and implement microarchitecture specifications for RISC-V-based systems.

  • Utilize EDA tools for simulation, synthesis and other design tasks.

  • Perform functional verification of RTL designs, including writing testbenches and debugging simulation results.

  • Integrate hardware components into complete systems, ensuring compatibility with embedded software.

  • Develop, test, and debug embedded software in C and assembly to support hardware functionality.

  • Conduct performance analysis and optimization of digital designs.

  • Document design processes, test results, and implementation details for cross-functional collaboration.

Required Qualifications

  • Master's degree in Electrical Engineering, Computer Engineering, or a related field.

  • Proven experience in digital hardware design with Verilog/SystemVerilog.

  • Familiarity with RISC-V ISA and microarchitecture design principles.

  • Familiarity with modern SoC design flows, including IP integration and verification.

  • Hands-on experience with EDA tools (e.g., Synopsys, Cadence, Mentor Graphics) for simulation and synthesis

  • Proficiency in embedded software development using C and assembly languages.

  • Strong understanding of computer architecture, memory hierarchies, and processor pipelines.

  • Experience with FPGA implementation and hardware/software co-design.

  • Familiarity with scripting languages (e.g., Python, Perl, TCL) for automation tasks.